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DATA SHEET
MOS INTEGRATED CIRCUIT
PD16818
MONOLITHIC DUAL H BRIDGE DRIVER CIRCUIT
DESCRIPTION
The PD16818 is a monolithic dual H bridge driver IC which uses N-channel power MOS FETs in its output stage. By employing the power MOS FETs for the output stage, this driver circuit has a substantially improved saturation voltage and power consumption as compared with conventional driver circuits that use bipolar transistors. In addition, the drive current can be adjusted by an external resistor in power-saving mode. The PD16818 is therefore ideal as the driver circuit of a 2-phase excitation, bipolar-driven stepping motor for the head actuator of an FDD.
FEATURES
* Compatible with 3V-/5V- supply voltage * Pin compatible with PD16803 * Low ON resistance (sum of ON resistors of top and bottom MOS FETs) RON1= 1.2 (VM = 3.0 V) RON2 = 1.0 (VM = 5.0 V) * Low current consumption: IDD = 0.4 mA TYP. (VDD = 2.7 V to 3.6 V) * Stop mode function that turns OFF all output MOS FETs * Drive current can be set in power-saving mode (set by external resistor) * Compact surface mount package
ORDERING INFORMATION
Part Number Package 20-pin plastic SOP (7.62 mm (300))
PD16818GS
ABSOLUTE MAXIMUM RATINGS (TA = 25 C)
Parameter Supply voltage Motor block Control block Power consumption Instantaneous H bridge drive current Input voltage Operating temperature range Operation junction temperature Storage temperature range Symbol VM VDD PD1 PD2 ID (pulse) VIN TA TJ (MAX) Tstg PW 5 ms, Duty 40 % Condition Rating -0.5 to +7.0 -0.5 to +7.0 1.0Note 1 1.25Note 2 1.0Note 2 -0.5 to VDD + 0.5 0 to 60 150 -55 to +150 A V C C C W Unit V
PD16818GS
Notes 1. IC only 2. When mounted on a glass epoxy printed circuit board (100 mm x 100 mm x 1 mm)
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information.
Document No. S11365EJ2V1DS00 (2nd edition) Date Published September 2004 N CP(K) Printed in Japan
c
PD16818
RECOMMENDED OPERAING CONDITIONS
Parameter Supply voltage Motor block Control block Rx pin connection resistance H bridge drive current (VDD = VM = 3 V)Note Charge pump capacitor capacitance Operating temperature Symbol VM VDD RX MIN. 2.7 2.7 2 430 5 0 20 60 TYP. MAX. 6.0 6.0 k mA nF C Unit V
PD16818GS
IDR C1-C3 TA
Note When mounted on a glass epoxy printed circuit board (100 mm x 100 mm x 1 mm) ELECTRICAL SPECIFICATIONS (Within recommended operating conditions unless otherwise specified) VDD = VM = 4.0 V to 6.0 V
Parameter OFF VM pin current Symbol IM Conditions INC pin low VM = VDD = 6 V Note 1 TA = 25 C, VIN = VDD 0 TA 60 C, VIN = VDD IIL1 TA = 25 C, VIN = 0 0 TA 60 C, VIN = 0 IIH2 TA = 25 C, VIN = VDD 0 TA 60 C, VIN = VDD PS pin low-level input voltage IIL2 TA = 25 C, VIN = 0 0 TA 60 C, VIN = 0 Input pull-up resistance (IN1, IN2, INC) PS pin input pull-down resistance RIND RINU TA = 25 C 0 TA 60 C TA = 25 C 0 TA 60 C Control pin high-level input voltage Control pin low-level input voltage H bridge ON resistanceNote 2 VIH VIL RON2 VDD = VM = 5 V Excitation direction <1>, <3> Excitation direction <2>, Charge pump circuit turn ON time H bridge turn ON time H bridge turn OFF time tONG tONH tOFFH VDD = VM = 5 V C1 = C2 = C3 = 10nF RM = 20 <4>Note 3 0.3 35 25 35 25 3.0 -0.3 1.0 50 50 1.0 MIN. TYP. MAX. 1.0 Unit
A
mA
VDD pin current High-level input current (IN1, IN2, INC) Low-level input current (IN1, IN2, INC) PS pin high-level input current
IDD IIH1
2.0 1.0 2.0 -0.15 -0.2 0.15 0.2 -1.0 -2.0 65 75 65 75 VDD + 0.3 0.8 2.0 15 5 2.0 2.0 5.0
A
mA
mA
A
k
k
V V %
RON relative accuracy
RON
ms
s s
Notes 1. When IN1 = IN2 = INC = "H", PS = "L" 2. Sum of ON resistances of top and bottom MOS FETs 3. For the excitation direction, refer to FUNCTION TABLE.
2
Data Sheet S11365EJ2V1DS
PD16818
ELECTRICAL SPECIFICATIONS (Within recommended operating conditions unless otherwise specified) VDD = VM = 2.7 V to 3.6 V
Parameter OFF VM pin current Symbol IM Conditions INC pin low VM = VDD = 3.6 V Note 1 TA = 25 C, VIN = VDD 0 TA 60 C, VIN = VDD IIL1 TA = 25 C, VIN = 0 0 TA 60 C, VIN = 0 IIH2 TA = 25 C, VIN = VDD 0 TA 60 C, VIN = VDD PS pin low-level input voltage IIL2 TA = 25 C, VIN = 0 0 TA 60 C, VIN = 0 Input pull-up resistance (IN1, IN2, INC) PS pin input pull-down resistance RIND RINU TA = 25 C 0 TA 60 C TA = 25 C 0 TA 60 C Control pin high-level input voltage Control pin low-level input voltage H bridge ON resistanceNote 2 VIH VIL RON1 VDD = VM = 3 V Excitation direction <1>, <3> Excitation direction <2>, Vx voltage in power-saving modeNote 4 Vx relative accuracy in powersaving mode Charge pump circuit turn ON time H bridge turn ON time H bridge turn OFF time tONG tONH tOFFH VX VDD = VM = 3 V RX = 270 k Excitation direction <1>, <3> Excitation direction <2>, <4> VDD = VM = 3 V C1 = C2 = C3 = 10nF RM = 20 0.3 <4>Note 3 1.0 1.2 35 25 35 25 2.0 -0.3 1.2 50 50 0.4 MIN. TYP. MAX. 1.0 Unit
A
mA
VDD pin current High-level input current (IN1, IN2, INC) Low-level input current (IN1, IN2, INC) PS pin high-level input current
IDD IIH1
1.0 1.0 2.0 -0.09 -0.12 0.09 0.12 -1.0 -2.0 65 75 65 75 VDD + 0.3 0.8 2.4 15 5 1.4 5 5 2.0 2.0 5.0
A
mA
mA
A
k
k
V V %
RON relative accuracy
RON
V
VX
%
ms
s s
Notes 1. When IN1 = IN2 = INC = "H", PS = "L" 2. Sum of ON resistances of top and bottom MOS FETs 3. For the excitation direction, refer to FUNCTION TABLE. 4. Vx is a voltage at point A (FORWARD) or B (REVERSE) of the H bridge in FUNCTION TABLE.
Data Sheet S11365EJ2V1DS
3
PD16818
PIN CONFIGURATION (Top View) 20-pin plastic SOP (7.62 mm (300))
C1H C2L VM1 1A PGND 2A VDD IN1 IN2 INC
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
C1L C2H VG 1B PGND 2B VM2 RX PS DGND
FUNCTION TABLE
Excitation Direction <1> <2> <3> <4> - F: FORWARD R: REVERSE INC H H H H L IN1 H L L H x IN2 H H L L x H1 F R R F Stop H2 F F R R
H1F <4> <1>
H2R
H2F
<3> H1R
<2>
FORWARD VM
REVERSE VM
STOP VM
ON
OFF
OFF
ON
OFF
OFF
A
B
A
B
A
B
OFF
ON
ON
OFF
OFF
OFF
4
Data Sheet S11365EJ2V1DS
PD16818
BLOCK DIAGRAM
0.01 F VDD C1L C1H C2L 0.01 F C2H VG 0.01 F
OSC CIRCUIT
CHARGE PUMP VM1
VM
RX
BAND GAP REFERENCE
LEVEL CONTROL CIRCUIT "H" BRIDGE 1 SWITCH CIRCUIT
1A 1B PGND VM2
Note
PS
50 k 50 k 50 k 50 k
IN1 IN2 INC DGND
CONTROL CIRCUIT
LEVEL SHIFT
2A "H" BRIDGE 2 2B PGND
Note The power-saving mode is set when the PS pin goes high. In this mode, the voltage of the charge pump circuit is lowered and the ON resistance of the H bridge driver transistor increases, limiting the current. Remark is connected in diffusion layer.
Data Sheet S11365EJ2V1DS
5
PD16818
CHARACTERISTIC CURVES
IDD vs. TA Characteristics 0.3 VDD = 3.6 V
Supply current IDD (mA) Supply current IDD (mA)
IDD vs. TA Characteristics 2 VDD = 6 V 1.5
0.2
1
0.1
0.5
0 -20
0
20 40 60 Ambient temperature TA (C)
80
0 -20
0
20 40 60 Ambient temperature TA (C)
80
IIHL1 vs. VDD Characteristics -0.1 IN1, IN2, and INC pins
Input current IIH1, IIL1 (mA)
IIHL1 vs. VDD Characteristics -0.2 IN1, IN2, and INC pins
Input current IIH1, IIL1 (mA)
-0.08 IIL1 -0.06 -0.04 -0.02 IIH1 0 2.8 3 3.2 3.4 Supply voltage VDD (V) 3.6
-0.15 IIL1 -0.1
-0.05 IIH1 4 5 Supply voltage VDD (V) 6
0
6
Data Sheet S11365EJ2V1DS
PD16818
IIHL1 vs. TA Characteristics -0.1 -0.2 IN1, IN2, and INC pins VIN = VDD = 3 V
IIHL1 vs. TA Characteristics IN1, IN2, and INC pins VIN = VDD = 5 V -0.15
Input current IIH1, IIL1 (mA)
-0.08 -0.06 -0.04 -0.02
IIL1
Input current IIH1, IIL1 (mA)
-0.1
IIL1
-0.05 IIH1
IIH1 0 -20 0 20 40 60 Ambient temperature TA (C) 80 0 -20 0 20 40
60
80
Ambient temperature TA (C)
IIHL2 vs. VDD Characteristics 0.1 0.2 PS pin VIN = 0 IIH2 0.06 0.04 0.02 0 IIL2 3 3.2 3.4 Supply voltage VDD (V)
IIHL2 vs. VDD Characteristics PS pin VIN = 0 0.15 IIH2 0.1
Input current IIH2, IIL2 (mA)
0.08
Input current IIH2, IIL2 (mA)
0.05 IIL2 4 5 Supply voltage VDD (V) 6
2.8
3.6
0
Data Sheet S11365EJ2V1DS
7
PD16818
IIHL2 vs. TA Characteristics 0.1
Input current IIH2, IIL2 (mA)
IIHL2 vs. TA Characteristics 0.2
Input current IIH2, IIL2 (mA)
0.08 0.06 0.04 0.02 IIL2 0 -20 0
PS pin VIN = 0 VDD = 3 V
0.15
PS pin VIN = 0 VDD = 5 V
IIH2
0.1
IIH2
0.05 IIL2
20 40 60 Ambient temperature TA (C)
80
0 -20
0
20 40 60 Ambient temperature TA (C)
80
VIHL vs. VDD Characteristics 2
Input voltage VIH, VIL (V)
VIHL vs. VDD Characteristics 3
Input voltage VIHL (V)
1.5
2.5
VIH
1
2
VIL
0.5
1.5
0
2.8
3 3.2 3.4 Supply voltage VDD (V)
3.6
1
4
5 Supply voltage VDD (V)
6
8
Data Sheet S11365EJ2V1DS
PD16818
VIHL vs. TA Characteristics 2 VDD = 3 V 1.5 3
VIHL vs. TA Characteristics VDD = 5 V
Input voltage VIH, VIL (V)
Input voltage VIHL (V)
2.5 VIH 2 VIL
1
0.5
1.5
0 -20
0
20 40 60 Ambient temperature TA (C)
80
1 -20
0
20 40 60 Ambient temperature TA (C)
80
RON vs. TA Characteristics 2 2 VDD = VM = 3 V RM = 20 1.5
RON vs. TA Characteristics
H bridge ON resistance RON ( )
H bridge ON resistance RON ( )
VDD = VM = 5 V RM = 12 1.5
1
1
0.5
0.5
0 -20
0
20 40 60 Ambient temperature TA (C)
80
0 -20
0
20 40 60 Ambient temperature TA (C)
80
Data Sheet S11365EJ2V1DS
9
PD16818
tONG vs. TA Characteristics Charge pump turn ON time tONG (ms) VDD = VM = 3 V RM = 12 Charge pump turn ON time tONG (ms) 1 0.8 0.6 0.4 0.2 0 -20 1 0.8 0.6 0.4 0.2 0 -20
tONG vs. TA Characteristics VDD = VM = 5 V RM = 20
0
20 40 60 Ambient temperature TA (C)
80
0
20 40 60 Ambient temperature TA (C)
80
tONH, tOFFH vs. TA Characteristics H bridge switching time tONH, tOFFH ( s) H bridge switching time tONH, tOFFH ( s) 2 tONH 1.5 VDD = VM = 3 V RM = 12 V 1 0.8 0.6 0.4 0.2
tONH, tOFFH vs. TA Characteristics VDD = VM = 5 V RM = 20
tONH
1
0.5 tOFFH 0 -20 0 20 40 60 Ambient temperature TA (C) 80
tOFFH 0 -20 0 20 40 60 Ambient temperature TA (C) 80
10
Data Sheet S11365EJ2V1DS
PD16818
Vx vs. Rx Characteristics
Vx voltage in power-saving mode Vx (V)
Vx vs. Rx Characteristics
Vx voltage in power-saving mode Vx (V)
3 VDD = VM = 3.3 V RM = 12 2
4 VDD = VM = 5 V RM = 12 3
2
1
1
0
100 200 300 400 Power-saving setting resistance Rx (k)
500
0
100 200 300 400 Power-saving setting resistance Rx (k)
500
PD vs. TA Characteristics ( PD16818GS) 1.4 When mounted on a printed circuit board
Average power consumption PD (W)
1.2 IC only 1.0 0.8 0.6 0.4 0.2
0
20
40 60 80 Ambient temperature TA (C)
100
Data Sheet S11365EJ2V1DS
11
PD16818
PACKAGE DRAWING
20-PIN PLASTIC SOP (7.62 mm (300))
20 11
detail of lead end
P
1 A
10
H G S L C D E F M
M
I
J
B N
K
S
NOTE Each lead centerline is located within 0.12 mm of its true position (T.P.) at maximum material condition.
ITEM A B C D E F G H I J K L M N P
MILLIMETERS 12.70.3 0.78 MAX. 1.27 (T.P.) 0.42 +0.08 -0.07 0.10.1 1.8 MAX. 1.550.05 7.70.3 5.60.2 1.1 0.22 +0.08 -0.07 0.60.2 0.12 0.10 3 +7 -3
P20GM-50-300B, C-7
12
Data Sheet S11365EJ2V1DS
PD16818
RECOMMENDED SOLDERING CONDITIONS
The PD16818 should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales representative. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Surface Mount Type
PD16818GS
Soldering Method Infrared reflow
20-pin plastic SOP (7.62 mm (300))
Soldering Conditions Package peak temperature: 235C, Time: 30 seconds MAX.(210C MIN.), Number of times: 3 MAX., Number of days: NoneNote, Flux: Rosin-based flux with little chlorine component (chlorine: 0.2 Wt% MAX.) Package peak temperature: 215C, Time: 40 seconds MAX.(200C MIN.), Number of times: 3 MAX., Number of days: NoneNote, Flux: Rosin-based flux with little chlorine component (chlorine: 0.2 Wt% MAX.) Package peak temperature: 260C, Time: 10 seconds MAX., Preheating temperature: 120 C MAX., Number of times: 1, Flux: Rosin-based flux with little chlorine component (chlorine: 0.2 Wt% MAX.) Symbol of Recommended Soldering IR35-00-3
VPS
VP15-00-3
Wave soldering
WS60-00-1
Note Number of days in storage after the dry pack has been opened. The storage conditions are at 25 C, 65 % RH MAX. Caution Do not use two or more soldering methods in combination.
Data Sheet S11365EJ2V1DS
13
PD16818
NOTES FOR CMOS DEVICES
1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN). 2 HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device. 3 PRECAUTION AGAINST ESD A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices. 4 STATUS BEFORE INITIALIZATION Power-on does not necessarily define the initial status of a MOS device. Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions. 5 POWER ON/OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. When switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. Use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. The correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. 6 INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I/O pull-up power supply while the device is not powered. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device.
14
Data Sheet S11365EJ2V1DS
PD16818
* The information in this document is current as of September, 2004. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. * No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. * NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. * Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. * While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. * NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to NEC Electronics products developed based on a customerdesignated "quality assurance program" for a specific application. The recommended applications of an NEC Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC Electronics product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to determine NEC Electronics' willingness to support a given application. (Note) (1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its majority-owned subsidiaries. (2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above).
M8E 02. 11-1

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